A new arXiv preprint reports a phase-modulated microwave driving technique for preserving coherence in a hole spin qubit formed in a silicon quantum dot. The technique addresses a known problem with these qubits: the spin-orbit coupling that enables fast, all-electrical control also increases their sensitivity to charge noise, which shortens coherence times. The abstract indicates that holes in silicon are also subject to additional noise mechanisms beyond charge noise.
OutlookPlausible
If the modulation scheme is compatible with existing microwave control hardware, this could become a standard extension for silicon hole spin qubits within two years, improving two-qubit gate fidelities by reducing charge-noise-induced dephasing while retaining fast electrical control.
An arXiv preprint examines a surface-code architecture in which electron spin qubits are physically moved between quantum dots. It uses a standard noise model to quantify how shuttling-induced errors affect the code's logical performance and its prospects for scaling to useful register sizes.
OutlookPlausible
Within two years, silicon spin-qubit teams could use this framework to set shuttling fidelity targets for early surface-code experiments, narrowing layout and material choices before expensive multi-qubit shuttling hardware is built.
Diraq and Dell Technologies have announced a collaboration to pair Diraq's silicon spin-qubit quantum processors with Dell's high-performance computing and AI infrastructure. Dell is installing an HPC server cluster directly in Diraq's Sydney laboratory to provide low-latency connections between the quantum hardware and classical compute for real-time control. The work includes developing hybrid orchestration software to automate qubit calibration.
OutlookPlausible
Within two years, Diraq could move from batch calibration to closed-loop, low-latency recalibration of its spin qubits during computation, using the in-lab Dell HPC cluster to make real-time adjustments that keep qubits stable through longer circuit runs.
Researchers reported progress on a quantum silicon-on-insulator (QSOI) substrate derived from a 28nm fully-depleted silicon-on-insulator platform, intended for 300mm CMOS-compatible fabrication of spin qubits. They fabricated quantum devices on both standard 28nm FD-SOI and the QSOI variant and compared them. The QSOI arrays showed highly uniform positioning of the first electron across qubit sites.
OutlookPlausible
If this uniformity persists across full 300mm wafers, it could allow silicon spin qubit arrays to be fabricated with consistent single-electron positions in commercial foundries within two years, reducing the need for per-device tuning.
Quobly reported a demonstration of qubit readout, single-qubit gates, and two-qubit gates on a single chip fabricated with its QSOI technology. The devices were built on a 300 mm silicon wafer, which the company positions as an industrial-scale platform for silicon spin qubits.
OutlookPlausible
If the demonstrated operations have usable fidelities, Quobly could move from single-device demonstrations to small multi-qubit arrays fabricated in a 300 mm CMOS-compatible flow within two years.
Silicon Quantum Computing reported that patterning its Watermelon quantum-enhanced AI chip, a step that previously took hours by hand, can now be completed in minutes. The company used custom machine learning scripts together with its Quokka software to automate part of the atomic-precision fabrication process.
OutlookPlausible
Faster patterning could let SQC iterate on atomic-precision device designs much more rapidly, turning hours-long manual layout cycles into quick parameter sweeps.
A preprint introduces an unsupervised autoencoder method for extracting effective Hamiltonians directly from experimental data taken on solid-state quantum simulators. The decoder is constrained by scattering-matrix physics, so the inferred model parameters are meant to represent physically meaningful Hamiltonian terms rather than arbitrary features. The authors present the approach as a generalizable framework for Hamiltonian identification in these systems.
OutlookPlausible
If the physics-constrained autoencoder performs well on noisy transport or spectroscopy data, spin-qubit groups could replace manual Hamiltonian characterization with a single learned calibration pass within two years.
A preprint proposes a spin-qubit architecture in which a shuttling bus is optimally synthesized to support transversal gates and magic state distillation. The work targets the gap between single-logical-qubit error correction and the need for high-fidelity logical operations between error-corrected qubits at scale.
OutlookPlausible
This could give experimental silicon spin-qubit groups a concrete route to demonstrating high-fidelity transversal Clifford gates on a small logical qubit within two years.
Diraq, a silicon spin-qubit developer, and data centre operator Equinix will install an eight-qubit quantum processor inside an Equinix facility in Sydney, with completion scheduled for October 2026. The deployment is presented as the first silicon spin-qubit quantum computer placed in a commercial data centre.
OutlookPlausible
The Sydney installation could let Australian enterprises access a local silicon spin-qubit processor through Equinix's existing data-centre interconnection services, opening early benchmarking and small algorithm-prototyping workloads without sending data to overseas quantum labs.
IBM has completed its acquisition of HRL Laboratories, a Malibu-based R&D institution. The deal brings HRL's silicon-spin qubit, quantum sensing, cryogenics, and advanced materials expertise under IBM's quantum umbrella. IBM says this complements its existing superconducting qubit work and supports a dual-track hardware roadmap.
OutlookPlausible
IBM could bring silicon-spin qubit test chips into its existing cryogenic and control stack within two years, giving it a second hardware modality alongside superconducting processors.
IBM completed its acquisition of HRL Laboratories, an R&D institution with expertise in quantum computing, quantum sensing, materials science, and advanced technologies. IBM states the combination will bring complementary capabilities to bear on its quantum hardware roadmap.
OutlookPlausible
IBM could incorporate HRL's silicon fabrication and cryogenic control techniques into its superconducting quantum processors, improving qubit coherence and reducing control wiring overhead in upcoming large-scale systems.
Photonic Inc. has published a paper in Nature Communications describing its SHYPS family of quantum error correction codes. The work focuses on quantum low-density parity-check (QLDPC) codes, which reduce the number of physical qubits needed to run a given program and could bring forward the arrival of commercially useful quantum computers.
OutlookPlausible
Photonic could use SHYPS codes to demonstrate an error-corrected logical qubit on a significantly smaller device than surface-code overhead would require.
Researchers posted a preprint describing zenDot, an LLM-integrated quantum TCAD platform for automating the design and optimization of semiconductor quantum devices. The platform targets spin-qubit and quantum-dot device simulation by coupling large language models with technology computer-aided design workflows.
OutlookPlausible
If zenDot's LLM layer can reliably map natural-language design goals to TCAD simulation parameters, small spin-qubit research groups could iterate on device layouts and gate voltages in days rather than weeks.
Researchers have posted a preprint describing spin qubits coupled via microwave cavities, a technique that could facilitate high-fidelity interactions between distant qubits. The work explores the use of cavity quantum electrodynamics to mediate entanglement in spin-based quantum processors.
OutlookPlausible
This coupling method could enable high-fidelity two-qubit gates between non-adjacent spin qubits, reducing error rates in small-scale arrays within two years.
Researchers have numerically optimized two-qubit gates for silicon flip-flop qubit arrays using electrical control. The study demonstrates improved gate fidelities through tailored pulse shapes and inter-qubit coupling strategies. This work addresses a key challenge in scaling spin-based quantum processors.
OutlookPlausible
Optimized gate schemes could be tested in existing silicon flip-flop qubit experiments, potentially raising two-qubit gate fidelities to levels where small error correction codes become viable.
Researchers have optically resolved the excited state hyperfine structure of a silicon color center operating in the telecom bands. The study reveals the coupling between electronic and nuclear spins, providing a path for improved spin control. This work demonstrates a key step toward efficient spin-photon interfaces at wavelengths compatible with fiber-optic networks.
OutlookPlausible
This understanding could enable higher-fidelity spin-photon entanglement at telecom wavelengths, improving the performance of prototype quantum repeaters within two years.
Two independent research groups have reported advances in semiconductor qubit fabrication or control that improve scalability, bringing silicon-based spin qubits closer to the qubit counts needed for error correction.
OutlookPlausible
These results could lead to demonstration of a 10-qubit semiconductor device with two-qubit gate fidelities above 99% within two years, making semiconductor qubits competitive with other platforms for early error-correction experiments.
GlobalFoundries has finalized a $375 million award under the US CHIPS Act to expand domestic fabrication capacity for quantum computing chips. The funding targets the physical hardware layer that supports hybrid quantum-classical and AI-accelerated computing stacks, such as those being assembled by NVIDIA and IonQ.
OutlookPlausible
This could enable US quantum hardware developers to iterate on cryogenic control and readout chips with shorter domestic fab cycles, accelerating integration of quantum processors into hybrid AI-quantum stacks.